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SpiceAge for Windows™ Features

Analyses ~ Interactive

SpiceAge includes the analyses of:

• Frequency (AC)
• Transient (large signal)
• Non-linear Quiescent DC
• Fourier

These may be further refined by the effects of component variations

• Monte Carlo
• Min & Max (Worst Case)

The end results may be evaluated as a family of curves by having

• Swept components
• Swept tolerances
• Swept temperatures

Frequency (AC)

• Calculate in addition to voltage, current or power: Gain, Reflection coefficient, Phase, Group delay, Noise, Impedance
• Real, imaginary or complex plane plotting
• Choose from several reference dB level options including gain relative to another non-ground point in the circuit
• Temp, tolerance, & component sweeping

Transient (large signal)

• Any number of voltage and/or current signals may used to stimulate the circuit
• Defined in Piece Wise Linear files or · Each Programmable in any combination of: step, impulse, ramp, square triangular, sine,pulse trains.or arbitrary waveform
• All waveform parameters are adjustable including offset, slew rate, duty cycle
• Set initial conditions
• Control of start, stop and step times
• Step time and signal stimulus may be changed on the fly during a calculation.
• Pause during transient calculation allows inspection of the results and intervention if necessary, {resUme} to continue
• Scope mode allows transient calculations to be extended beyond their original stop time
• Shows the traces in real-time (on autoscaling axes) as the results are calculated
• X-Y plotting option
• Temperature, tolerance, and component sweeping

DC - Non-linear Quiescent

• Circuits may be started: cold or under quiescent conditions
• Temp, tolerance, & component sweeping

Fourier

• Plotted discrete (lines to origin) or continuous spectrum
• Hanning (raised cosine) window option
• Inverse Fourier transform
• Auto-dispersion (based on preceding transient analysis or frequency
• Phase angle and various y-scale options on autoscaling axes
• Real or Imaginary option

Monte Carlo

• All components with a tolerance contribute to a family of curves (or quiescent voltage tabulations)
• Each component value is chosen at random within the tolerance
• Tolerancing statistics

Min & Max (Worst Case)

• The values of all components are set to the MINimum or MAXimum within their tolerances
• Negative tolerances may be used to create an algebraically negative value change

Swept components

• Components may optionally take vs (start value) and vf (finish value) pragmas between which a number of swept values produce a family of curves

Swept tolerances

Swept temperatures

• Temperature may be swept to produce a family of curves in a DC, AC or transient analysis

Sweeping functions for family of curves generation

• linear
• logarithmic
• MIN, MAX
• Monte Carlo

~ Components ~

Primitives

• B, Battery (constant voltage source)
• A, Constant current source
• R, Resistor
• Cg, Conductor
• Sq, Square law conductor
• Diodes - Fast (area factor +offset temp.) and Zener models
• Diodes (SPICE.mod implementation). Level 7
• C, Capacitor
• L, Inductor
• LINE, Transmission line (4 terminal) - Frequency and time domain
• I, current generator
• V, voltage generator
• Z, Zener diode
• S, Voltage-controlled switch with offset and delay (SPICE.mod implementation). Level 7
• VCVS: (voltage controlled voltage source)
• VCCS: (voltage controlled current source)
• CCVS: (current controlled voltage source)
• CCCS: (current controlled current source)
• E (SPICE VCVS). Level 7
• G (SPICE VCCS). Level 7
• H (SPICE CCVS). Level 7
• F (SPICE CCCS). Level 7
• Q, BJT (SPICE.mod implementation). Level 7
• J, JFET (SPICE.mod implementation). Level 7
• M, MOSFET (SPICE.mod implementation). Level 7
• K SPICE coupling coeffient. Level 7
• SPICE .models and subcircuits. Level 7
• Logic gate primitives (high speed). Level 11 and above
• Digital bus generator. Level 11 and above
• S parameter and Y parameters defined networks

Component Variables/Functions

• Polynomials non-linearities (all components)- outside of range limiting pragmas
• Frequency dependent PWL
• Temperature coefficients
  • offset and linear. Level 3 and above
  • 2nd order and exponential. Level 7 and above
• Independent & dependent source
• Delay, jitter
• Initial conditions
• Values voltage controllable
• Magnetic saturation and hystersis

Macro Models Library (open models)

Topology changable and value trimmable

• NPN/PNP BJT transistors
• FET field effect transistors
• OpAmps
• Thyristor
• Triac
• Diodes
• Bridge rectifier
• Transformers
• Logic gates
• 555 timer
• Zetex SPICE library
• Components with value modulated by a controlling voltage ADMUL.lib, admittance VMUL.lib, voltage ZMUL.lib, impedence
• Phase lock- loop
• Voltage controlled oscillator
• Triode vacuum tube
• TTL Library (gates, latches counters). Level 11 and above

~ Output ~

Graphical Presentation

• 4 trace plots
• Smith charts
• Auto or user defined scaling · Fully adjustable on each trace
• Automatic graph labels
• Choice of reference signals
• Pen-width control, thick trace option
• Offset and multiplier adjustments
• Displays parameters of
  • voltage
  • signal to noise
  • current
  • noise density
  • power
  • impedance
  • gain
  • phase
  • noise
  • group delay
• 'Scope' on-line mode to show results plotted in Real time
• X-Y locus plotting (Lissajou figures, phasor diagrams, etc.)
• Font scaling option (for screen dumps)
• Paste over plot comparisons
• User-definable and placeable labels
• Truetype fonts
• Digitizing cursor- Single point or differences
• Optional graph grid
• Tiling of multiple netlist windows and/or graph windows
• Window dedicated to screen capture
• Direct graph printer dump, Windows drivers
• Logic circuit analyzer - 32 channels. Level 11 and above

Output Waveforms

• ASCII and .WAV file compatibility
• Output file is in the same syntax as user defined input signals
• Output of one circuit may be chained as the input of the next circuit

Results

• Tabular (unlimited) or graphic (4 traces)
• Real time
• Interruptable settings change

~ Additional Features ~

• Circuit size only limited by RAM memory
• Built-in ASCII file editor
• Full color palette
• SI abbreviated or exponential notation
• Comprehensive On-line help; tutorials / examples
• .INI file to personalize initialization
• 300+ page manual
• Convenient menu system
• User selected reference node
• Sparse matrices - saves memory, increases speed
• Concurrent analysis from within iconised windows

DDE (dynamic data exchange)

Interface with:

• SAWTEST example circuit / analyses files (included)
• MODELMAKER component synthesis (option)
• Schematic capture companion products
• Third party CAE software

Circuit Size

• Calculation speed optimized for circuits up to 300 nodes
• Larger circuits (up to 1800 nodes) limited only by available RAM

Node Notation

• Node numbers, real signal or real pin names (alpha-numeric) may be used

Tel: +44 (0) 208 906 0155 - Email: sales@those-engineers.co.uk